Portable communication devices, such as cellular telephones, personal digital assistants (PDAs), WIFI transceivers, and other communication devices must be capable of communicating more and more data. For example, in the emerging markets of 3G/3.9G, linear systems such as those the communicate using standards such as WCDMA, WiMAX, EUTRAN-LTE, and other non-constant envelope modulation methodologies, the requirement for highly efficient power amplifiers that exhibit good linearity and power control under mismatch continues to be very challenging.
The power detection architecture and methodology is one of the key parameters in maintaining power amplifier linearity and linear power control. A number of well-known detection architectures and methodologies are currently used, including forward power detection using a coupler and a detector; implementing a detector at the power amplifier output, for example using a collector voltage detector; and current detection using a current mirror.
The forward power detection using a power coupler and power detector methodology is appropriate for a nonlinear system such as GSM because it allows constant output power to be maintained for different phases having different mismatch. However, such a forward power detection scheme is not as effective for a high peak-to-average ratio (PAR) linear system because for high impedance phases of the output signal the collector voltage has to be significantly increased in order to maintain the same linear output power. Unfortunately, this arrangement leads to premature power amplifier compression.
Implementing a detector at the power amplifier output, for example using a collector voltage detector, is more preferable than implementing power amplifier output voltage detection because of the phase shift imposed by the matching circuitry, which is typically located between the collector of the power amplifier and the output terminal of the power amplifier. Maintaining the collector voltage constant in a closed power control loop keeps the amount of back-off constant regardless of the different phases having differing mismatch. However, this is achieved at the expense of output power. Even though the requirements for output power deviation are not as stringent in a linear system, excessive power drop under mismatch is not acceptable.
The current detection scheme using a current mirror is not applicable to a linear system because for most nonlinear high impedance phases the current drops, which causes the input power to increase in the closed power control loop. This leads to further power amplifier compression.
One approach that provides a good compromise between power and linearity is the use of a balanced power amplifier. However, a balanced power amplifier adds complexity and physical size. Further, a balanced power amplifier may introduce additional losses in a 90 degree hybrid circuit, which leads to degraded efficiency.
Therefore, a detector which is capable of detecting output power and maintaining power amplifier linearity is desirable.